高穩(wěn)定100KHz時(shí)鐘發(fā)生電路,100khz clock generator
高穩(wěn)定100KHz時(shí)鐘發(fā)生電路,100khz clock generator
關(guān)鍵字：高穩(wěn)定100KHz時(shí)鐘發(fā)生電路
Build A 100Khz Crystal Calibrator
By N1HFX
There is a great deal of old amateur gear which many amateurs have decided to restore and bring back to life. While much of the early amateur transceivers work just fine they usually lack a digital readout and must rely on analog dials for tuning. The problem of dial calibration is complicated by the non-linear effects of tuning capacitors. This month's circuit is a 100Khz crystal calibrator using an inexpensive microprocessor crystal and CMOS IC's which are readily available at Radio Shack.
The main problem with building a 100Khz oscillator is the unavailability of 100Khz crystals. Even if you find a vendor willing to cut such a crystal for you, plan on paying $20 or more not including shipping charges. The circuit in Figure 1 uses an inexpensive 8Mhz microprocessor crystal which can be easily obtained from most parts suppliers for about $1. Using a 74HCT393 binary counter IC, we can easily divide down the 8 MHz signal from our crystal into 100Khz or almost any frequency we need.
The circuit in Figure 1 uses a couple of NAND gates (74HCT00 IC) for our 8Mhz crystal oscillator. Capacitor C2 actually helps us tune the crystal to the exact frequency, Use any value of C2 from about 22pf to about 82pf to get the oscillator on frequency. In the prototype, 68pf worked fine for most of the crystals tested. For an exact frequency, replace C2 with a 22pf and add a 50pf trimmer capacitor in parallel. By adjusting the 50pf trimmer capacitor, we can easily get the crystal exactly on frequency. The first NAND gate is our oscillator while the second NAND gate acts as a buffer and conditions the signal. This signal is then fed into the clock pulse input of one of the 4 bit binary counters in IC2. By taking the output from the Q3 signal, we have now divided the signal by 16 giving us 500Khz. This signal is now fed into the clock pulse input of the second 4 bit binary counter. In the first counter we tied the MR (clock reset) line to ground. In the second counter, we need the count to reset when we reach a binary five, which will allow us to divide the 500Khz by 5. For this counter, we used the last 2 remaining NAND gates in IC1 to detect the desired value. When we reach the correct reset interval, the MR line goes high resetting the counter to zero and allowing us to effectively divide by 5. The 100Khz output is taken from the Q2 line and is coupled through capacitor C4.
If you prefer, this circuit can be easily changed to a 50Khz calibrator by wiring pins 13 & 14 of IC1 into pins 10 and 8 of IC2. See Figure 2 for details. This arrangement makes the second counter reset at binary 10 which divides the 500Khz by 10 giving us the desired 50Khz.
The HCT series CMOS logic IC's require a 5 volt power supply just like the old TTL logic series. In this circuit we used a 5 volt zener diode, D1, along with resistor R2 to get 12 volts down to 5 volts. Capacitor C3 is used primarily for bypassing the oscillator and must be used in this circuit. If you prefer to power this circuit from a 9 volt battery, then reduce resistor R2 to 220 ohms for best performance.
If you plan to install this circuit inside a transceiver, feed the output directly to the receiver front end. Make certain you have connected it after the TR relay so that the circuit doesn't get zapped by RF from the transmitter side. Also, you will want to install an ON/OFF switch which will interrupt the 12V line going to the circuit. As with all static sensitive CMOS IC's, use special handling precautions and do not leave out those IC sockets.
This circuit has been found to generate accurate birdies at every 100Khz and will be an excellent aid in getting that old rig right on frequency. The accuracy of the 100Khz birdies will depend on how close the 8Mhz oscillator is on frequency. With the difficulty in getting crystals for specific frequencies, this circuit gives new meaning to the words "Divide and Conquer".
要產(chǎn)生100千赫茲頻率的電路，如果采用晶體管搭建的LC震蕩電路，當(dāng)要求頻率很穩(wěn)定時(shí)比較困難，而采用晶體震蕩器則容易實(shí)現(xiàn)，而低頻率的晶體震蕩器又不容易獲得，下面的電路就能夠?qū)㈩l率較高的晶體震蕩器通過(guò)適當(dāng)?shù)碾娐份敵鲱l率較低的信號(hào)。
電路原理簡(jiǎn)單，通過(guò)IC1的門(mén)電路，晶體以及外圍電路組成8M赫茲震蕩器，通過(guò)IC2分頻獲得100千赫茲信號(hào)。
DE N1HFX
下圖是產(chǎn)生50千赫茲的電路，13腳接上圖的IC2的6腳就可以了。
元件清單
Parts List
| C1
聲明：本文內(nèi)容及配圖由入駐作者撰寫(xiě)或者入駐合作網(wǎng)站授權(quán)轉(zhuǎn)載。文章觀點(diǎn)僅代表作者本人，不代表電子發(fā)燒友網(wǎng)立場(chǎng)。文章及其配圖僅供工程師學(xué)習(xí)之用，如有內(nèi)容侵權(quán)或者其他違規(guī)問(wèn)題，請(qǐng)聯(lián)系本站處理。
舉報(bào)投訴
發(fā)布評(píng)論請(qǐng)先 登錄 相關(guān)推薦 求助，有適合100kHz~500kHz的集成放大器芯片嗎？
如題，Ti 有適合100kHz~500kHz 的集成放大器芯片嗎？功率不超過(guò)50w，單電源供電的。
目前看到的絕大部分是音頻功放。
發(fā)表于 10-16 07:34
頻響范圍100hz~20khz 與60hz-20khz哪個(gè)好在比較頻響范圍100Hz 20kHz與60Hz 20kHz哪個(gè)更好時(shí)，可以從以下幾個(gè)方面進(jìn)行分析： 一、頻響范圍的定義 頻率范圍 ：音箱最低有效回放頻率與最高有效回放頻率之間的范圍，單位赫茲（Hz
INA128對(duì)100kHz 2mV的100倍放大，怎么達(dá)不到？
在輸入信號(hào)為100kHz 2mV時(shí)，選用的電阻為505.1Ω，設(shè)計(jì)增益為100，但仿真出來(lái)的結(jié)果是181mV，增益為90.5?？墒荌NA128的增益帶寬積在G=100時(shí)，可達(dá)到200kHz
發(fā)表于 09-20 08:28
OPA564-Q1從20kHz~100kHz這個(gè)頻段的THD+N指標(biāo)是多少呢？OPA564-Q1的信號(hào)頻率范圍是1k~100kHz，輸入電壓峰值10v（即峰峰值+-10v，其中DAC為20位，最大支持+-15v的電壓峰峰值輸出）；OPA564-Q1的輸出負(fù)載為感性負(fù)載（直流電阻4歐，電感
發(fā)表于 09-13 07:45
TLV3501輸入的正弦超過(guò)100KHz輸出的方波就會(huì)出現(xiàn)失真，怎么解決？按照技術(shù)手冊(cè)做的一個(gè)過(guò)零比較器，但是輸入的正弦（峰峰值2V）超過(guò)100KHz輸出的方波就會(huì)出現(xiàn)失真？怎么辦。
發(fā)表于 08-26 07:29
OPA365芯片明明增益帶寬50MHz，為什么噪聲密度曲線只到100KHz，后面頻率就沒(méi)了呢？
諸位大牛好！我想請(qǐng)教下，TI的OPA365芯片明明增益帶寬50MHz，但為什么噪聲密度曲線只到100KHz，后面頻率就沒(méi)了呢？
如果想知道其工作在500KHz的噪聲密度怎么辦？謝謝諸位解答！??！祝心情愉快~
發(fā)表于 08-21 07:33
OPA2333積分電路100k頻率不放大是怎么回事？
圖一20mv 50hz正常放大；圖二20mv 100khz放大信號(hào)過(guò)小。有什么辦法可以100khz放大20mv到1V
發(fā)表于 08-05 08:00
LF353運(yùn)放輸入20khz的正弦波，低通濾波截止頻率100khz后有相位差如何解決？
運(yùn)放輸入20khz的正弦波，低通濾波截止頻率100khz后有相位差，有啥辦法解決嗎
發(fā)表于 07-31 06:00
求助，關(guān)于AMC1200采樣50KHZ模擬信號(hào)問(wèn)題求解
需要對(duì)50KHZ，高2.6V，低0V的方波模擬信號(hào)進(jìn)行隔離采樣，考慮使用AMC1200芯片是否合適，因?yàn)槲铱词謨?cè)其帶寬只有100KHZ不對(duì)我模擬信號(hào)大多少，而且該芯片上升下降時(shí)間也達(dá)到us級(jí)壓擺率很低估計(jì)不能很好跟蹤到輸入高頻
發(fā)表于 07-30 07:47
使用CX3為EVAL_PASCO2_SENSOR添加寄存器，i2c運(yùn)行頻率如何設(shè)置為100kHz？ 并為我的圖像EVAL_PASCO2_SENSOR添加寄存器。 i2c默認(rèn)運(yùn)行頻率為 400kHz，如何將其設(shè)置為 100kHz？
發(fā)表于 03-06 06:50
AnaPico多通道矢量信號(hào)源100KHz至40GHzAPVSGXX-X 系列是高速切換APVSG系列矢量信號(hào)發(fā)生器的多通道版本，覆蓋從 100 kHz 到 4、6、12、20 或 40 GHz 的連續(xù)頻率范圍?？蓪?shí)現(xiàn)出色的超快的相位同步和相參輸出的頻率掃描、啁啾、脈沖內(nèi)調(diào)制、脈沖
PC5028可調(diào)頻率輸出內(nèi)置驅(qū)動(dòng)MOSFET低至100KHZ頻率寬壓輸入輸出，14μA?1.2μA的低關(guān)斷IQ?100%工作循環(huán)通過(guò)模式同步MOSFET?100kHz的可編程開(kāi)關(guān)頻率至3MHz?從100kHz到3MHz與外部時(shí)鐘同步?低EMI擴(kuò)頻?可選擇的連續(xù)
發(fā)表于 12-25 18:23
AD7740輸出頻率不穩(wěn)定怎么解決？使用AD7740進(jìn)行電壓與頻率的轉(zhuǎn)換，供電電壓采用穩(wěn)定的5V，時(shí)鐘采用FPGA給定100KHz，工作在BUF=0的狀態(tài)，將輸入電壓連接到GND，然后輸出頻率按照計(jì)算應(yīng)該為10K，可是輸出頻率不
發(fā)表于 12-07 07:00
ADA4961、AD8352是否支持覆蓋低頻段，如100kHz~10MHz？ADA4961、AD8352是否 支持覆蓋低頻段，如100kHz~10MHz？
我看到datasheet里面性能測(cè)試曲線都才到10MHz，但是我的應(yīng)用需要支持到100kHz。
如果
發(fā)表于 11-22 07:25
版權(quán)所有 ? 湖南華秋數(shù)字科技有限公司 長(zhǎng)沙市望城經(jīng)濟(jì)技術(shù)開(kāi)發(fā)區(qū)航空路6號(hào)手機(jī)智能終端產(chǎn)業(yè)園2號(hào)廠房3層（0731-88081133） 電子發(fā)燒友 （電路圖） 湘公網(wǎng)安備43011202000918 工商網(wǎng)監(jiān)
湘ICP備2023018690號(hào)-1
|
評(píng)論