TI AFE7444RADAR和無(wú)線5G測(cè)試器時(shí)鐘參考設(shè)計(jì)TIDA－010131

TI公司的AFE7444是基于14位9GSPS DAC和14位3GSPS ADC的四路寬帶RF取樣模擬前端(AFE),工作頻率RF高達(dá)6GHz.該器件能直接在C波段進(jìn)行RF取樣而不需要另外的頻率轉(zhuǎn)換級(jí).四路14位9GSPS DAC信號(hào)帶寬高達(dá)800MHz,四路14位3GSPS ADC信號(hào)帶寬高達(dá)800MHz,NSD為–151 dBFS/Hz,在fIN = 2.6 GHz的AC性能為–3 dBFS,ANR為55 dBFS,SFDR為73 dBc HD2和HD3.AFE7444的9 GSPS時(shí)的DAC功耗為1.7W/路,3GSPS時(shí)的ADC功耗為1.8W/路,主要用在案通信設(shè)備和測(cè)試器以及礦帶數(shù)字化儀和波形發(fā)生器.本文介紹了AFE7444主要特性,功能框圖,以及RADAR和無(wú)線5G測(cè)試器多路RF收發(fā)器時(shí)鐘參考設(shè)計(jì)TIDA-010131主要特性,RADAR RF前端子系統(tǒng)框圖和主要技術(shù)指標(biāo),參考設(shè)計(jì)TIDA-010131框圖,多路時(shí)鐘板框圖,多個(gè)測(cè)量測(cè)試建立圖,時(shí)鐘板電路圖,FMC+ TO FMC+適配板電路圖和參考設(shè)計(jì)TIDA-010131材料清單.

The AFE7444 is a quad-channel, wideband, RFsamplinganalog front end (AFE) based on 14-bit, 9-GSPS DACs and 14-bit, 3-GSPS ADCs. Withoperation at an RF of up to 6 GHz, this deviceenables direct RF sampling into the C-bandfrequency range without the need for additionalfrequency conversions stages. This improvement indensity and flexibility enables high-channel-count,multimission systems.

The DAC signal paths support interpolation anddigital up conversion options that deliver up to 800MHz of signal bandwidth. The differential output pathincludes a digital step attenuator (DSA), whichenables tuning of output power.Each ADC input path includes a dual DSA and RFand Digital power detectors. Flexible decimationoptions provide optimization of data bandwidth.

An 8-lane (8 TX + 8 RX) subclass-1 compliantJESD204B interface operates at up to 15 Gbps. Abypassable on-chip PLL simplifies clock operationwith an optional clock output.

AFE7444主要特性:

1? Four, 14-bit, 9-GSPS DACs
– Up to 800-MHz signal bandwidth
– 1 DSA per channel tunes output power
? Four, 14-Bit, 3-GSPS ADCs
– Up to 800-MHz signal bandwidth
– NSD: –151 dBFS/Hz
– AC performance at fIN = 2.6 GHz, –3 dBFS
– SNR: 55 dBFS
– SFDR: 73 dBc HD2 and HD3
– SFDR: 91 dBc worst spur
– 2 DSA per channel extends dynamic range
– RF and digital power detectors
? RF frequency range: 10 MHz to 6 GHz
? Fast frequency hopping < 1 μs
? Receive digital signal path:
– dual DDC per ADC
– 3-phase coherent 32-bit NCOs per DDC
– Decimation ratio: 3x to 32x
? Transmit digital signal path:
– Dual DUC per DAC with 32-bit NCOs
– Interpolation ratio: 8x to 36x
– Sin(x)/x correction and configurable delay
– Power amplifier protection (PAP)
? JESD204B interface:
– 8 transceivers at up to 15 Gbps
– Subclass 1 multichip synchronization
? Clocks:
– Internal PLL and VCO with bypass option
– Clock output up to 3 GHz with clock divider
? DAC power dissipation: 1.7 W/ch at 9 GSPS
? ADC power dissipation: 1.8 W/ch at 3 GSPS
? Package: 17-mm x 17-mm FC BGA, 0.8-mm pitch

AFE7444應(yīng)用:

? Communications equipment and testers
? Wideband digitizers and waveform generators

圖1.AFE7444功能框圖

RADAR和無(wú)線5G測(cè)試器多路RF收發(fā)器時(shí)鐘參考設(shè)計(jì)TIDA-010131

Analog front end for high-speed end equipments likephased-array radars, wireless communication testers,and electronic warfare require synchronized, multipletransceiver
signal chains. Each transceiver signalchain includes high-speed, analog-to-digital converters(ADCs), digital-to-analog converters (DACs), and aclock subsystem. The clock subsystem provides lownoise sampling clocks with precise delay adjustment toachieve lowest channel-to-channel skew and optimumsystem performance like signal-to-noise ratio (SNR),spurious free dynamic range (SFDR), IMD3, effectivenumber of bits (ENOB), and so forth. This referencedesign demonstrates multichannel JESD204B clocksgeneration and system performance with AFE7444EVMs. Channel-to-channel skew better than 10 psachieved with 6 GSPS/3 GSPS DAC/ADC clocks up to2.6-GHz radio frequencies and system performancelike SNR and SFDR are comparable to the AFE7444data sheet specifications.

參考設(shè)計(jì)TIDA-010131主要特性:

? JESD204B complaint clock solution for 8T8R RFsampling analog front end
? Digital functions synchronization across multiple RFAFE transceivers
? Low phase noise clock generation for 14-bit, RFsamplingAFEs
? Fine phase delay adjustment in steps ofapproximately 500 fs to achieve phasesynchronization across multiple devices
? Supports TI’s high-speed data converters andcapture cards (AFE7444EVM, TSW14J56EVM,TSW14J57EVM)

參考設(shè)計(jì)TIDA-010131應(yīng)用:

? Phased-array radars
? Wireless communications test equipment
? Electronic warfare