STM32時(shí)鐘系統(tǒng)詳解

1. STM32的時(shí)鐘源主要有：

內(nèi)部時(shí)鐘

外部時(shí)鐘

鎖相環(huán)倍頻輸出時(shí)鐘

1.1 詳細(xì)介紹

HSI(內(nèi)部高速時(shí)鐘)

它是RC振蕩器，頻率可以達(dá)到8MHZ，可作為系統(tǒng)時(shí)鐘和PLL鎖相環(huán)的輸入。

HSE（外部高速時(shí)鐘）

接入晶振范圍是4-16MHZ，可作為系統(tǒng)時(shí)鐘和PLL鎖相環(huán)的輸入，還可以經(jīng)過128分頻之后輸入給RTC。

LSI（內(nèi)部低速時(shí)鐘）

它是RC振蕩器，頻率大概為40KHZ,供給獨(dú)立看門狗或者RTC，并且獨(dú)立看門口只能依靠LSI作為時(shí)鐘源。

LSE(外部低速時(shí)鐘)

通常外接32.768MHZ晶振提供給RTC。

PLL（鎖相環(huán)）

用來倍頻輸出。因?yàn)殚_發(fā)板外部晶振只有8MHZ，而STM32最大工作頻率是72MHZ。他可以通過HSI輸入，HSE輸入或兩分頻輸入，通過PLL倍頻（2-16），倍頻之后輸入給系統(tǒng)時(shí)鐘。

MCO（時(shí)鐘輸出管腳）

通常對(duì)應(yīng)STM32 PA8，它可以選擇一個(gè)時(shí)鐘信號(hào)輸出，給外部的系統(tǒng)提供時(shí)鐘源。

2. 標(biāo)準(zhǔn)庫的時(shí)鐘配置

2.1 stm32啟動(dòng)文件

首先打開startup_stm32f10x_hd.s，該文件為stm32的啟動(dòng)文件，在該文件內(nèi)會(huì)發(fā)現(xiàn)有這么一塊用匯編寫的代碼。

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??????Reset_Handler???PROC
????????????EXPORT??Reset_Handler????[WEAK]
????????????IMPORT??__main
????????????IMPORT??SystemInit
????????????LDR?????R0,?=SystemInit
????????????BLX?????R0???????????????
????????????LDR?????R0,?=__main
????????????BX??????R0
????????????ENDP

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通過這段匯編代碼可以看出，程序在執(zhí)行main函數(shù)之前，會(huì)先執(zhí)行SystemInit函數(shù)。

2.2 SystemInit函數(shù)詳解

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void?SystemInit?(void)
{
??/*?Reset?the?RCC?clock?configuration?to?the?default?reset?state(for?debug?purpose)?*/
??/*?Set?HSION?bit?*/
??RCC->CR?|=?(uint32_t)0x00000001;

??/*?Reset?SW,?HPRE,?PPRE1,?PPRE2,?ADCPRE?and?MCO?bits?*/
#ifndef?STM32F10X_CL
??RCC->CFGR?&=?(uint32_t)0xF8FF0000;
#else
??RCC->CFGR?&=?(uint32_t)0xF0FF0000;
#endif?/*?STM32F10X_CL?*/???

??/*?Reset?HSEON,?CSSON?and?PLLON?bits?*/
??RCC->CR?&=?(uint32_t)0xFEF6FFFF;

??/*?Reset?HSEBYP?bit?*/
??RCC->CR?&=?(uint32_t)0xFFFBFFFF;

??/*?Reset?PLLSRC,?PLLXTPRE,?PLLMUL?and?USBPRE/OTGFSPRE?bits?*/
??RCC->CFGR?&=?(uint32_t)0xFF80FFFF;

#ifdef?STM32F10X_CL
??/*?Reset?PLL2ON?and?PLL3ON?bits?*/
??RCC->CR?&=?(uint32_t)0xEBFFFFFF;

??/*?Disable?all?interrupts?and?clear?pending?bits??*/
??RCC->CIR?=?0x00FF0000;

??/*?Reset?CFGR2?register?*/
??RCC->CFGR2?=?0x00000000;
#elif?defined?(STM32F10X_LD_VL)?||?defined?(STM32F10X_MD_VL)?||?(defined?STM32F10X_HD_VL)
??/*?Disable?all?interrupts?and?clear?pending?bits??*/
??RCC->CIR?=?0x009F0000;

??/*?Reset?CFGR2?register?*/
??RCC->CFGR2?=?0x00000000;??????
#else
??/*?Disable?all?interrupts?and?clear?pending?bits??*/
??RCC->CIR?=?0x009F0000;
#endif?/*?STM32F10X_CL?*/

#if?defined?(STM32F10X_HD)?||?(defined?STM32F10X_XL)?||?(defined?STM32F10X_HD_VL)
??#ifdef?DATA_IN_ExtSRAM
????SystemInit_ExtMemCtl();?
??#endif?/*?DATA_IN_ExtSRAM?*/
#endif?

??/*?Configure?the?System?clock?frequency,?HCLK,?PCLK2?and?PCLK1?prescalers?*/
??/*?Configure?the?Flash?Latency?cycles?and?enable?prefetch?buffer?*/
??SetSysClock();

#ifdef?VECT_TAB_SRAM
??SCB->VTOR?=?SRAM_BASE?|?VECT_TAB_OFFSET;?/*?Vector?Table?Relocation?in?Internal?SRAM.?*/
#else
??SCB->VTOR?=?FLASH_BASE?|?VECT_TAB_OFFSET;?/*?Vector?Table?Relocation?in?Internal?FLASH.?*/
#endif?
}

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打開內(nèi)部8M時(shí)鐘

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RCC->CR?|=?(uint32_t)0x00000001

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通過查看寄存器手冊(cè)可知，這段代碼為打開內(nèi)部8M時(shí)鐘。

設(shè)置時(shí)鐘配置寄存器

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#ifndef?STM32F10X_CL
??RCC->CFGR?&=?(uint32_t)0xF8FF0000;
#else
??RCC->CFGR?&=?(uint32_t)0xF0FF0000;
#endif?/*?STM32F10X_CL?*/???

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對(duì)應(yīng)寄存器說明可查看《STM32中文參考手冊(cè)_V10》的6.3.2 時(shí)鐘配置寄存器(RCC_CFGR)章節(jié)。

后續(xù)代碼，有興趣可根據(jù)《STM32中文參考手冊(cè)_V10》手冊(cè)，查看代碼具體作用。

2.3 SetSysClock()函數(shù)詳解

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static?void?SetSysClock(void)
{
#ifdef?SYSCLK_FREQ_HSE
??SetSysClockToHSE();
#elif?defined?SYSCLK_FREQ_24MHz
??SetSysClockTo24();
#elif?defined?SYSCLK_FREQ_36MHz
??SetSysClockTo36();
#elif?defined?SYSCLK_FREQ_48MHz
??SetSysClockTo48();
#elif?defined?SYSCLK_FREQ_56MHz
??SetSysClockTo56();??
#elif?defined?SYSCLK_FREQ_72MHz
??SetSysClockTo72();
#endif
}

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system_stm32f10x.c文件中會(huì)根據(jù)芯片的型號(hào)定義對(duì)應(yīng)的宏

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#if?defined?(STM32F10X_LD_VL)?||?(defined?STM32F10X_MD_VL)?||?(defined?STM32F10X_HD_VL)
/*?#define?SYSCLK_FREQ_HSE????HSE_VALUE?*/
?#define?SYSCLK_FREQ_24MHz??24000000
#else
/*?#define?SYSCLK_FREQ_HSE????HSE_VALUE?*/
/*?#define?SYSCLK_FREQ_24MHz??24000000?*/?
/*?#define?SYSCLK_FREQ_36MHz??36000000?*/
/*?#define?SYSCLK_FREQ_48MHz??48000000?*/
/*?#define?SYSCLK_FREQ_56MHz??56000000?*/
#define?SYSCLK_FREQ_72MHz??72000000
#endif

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3. 時(shí)鐘配置函數(shù)

3.1 時(shí)鐘初始化配置函數(shù)

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void?SystemInit(void);
SYSCLK(系統(tǒng)時(shí)鐘)=72MHZ;
AHB總線時(shí)鐘(HCLK=SYSCLK)=72MHZ;
APB1總線時(shí)鐘(PCLK1=SYSCLK/2)=36MHZ;
APB2總線時(shí)鐘(PCLK1=SYSCLK/1)=72MHZ;
PLL主時(shí)鐘=72MHZ;

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3.2 外設(shè)時(shí)鐘使能配置函數(shù)

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void?RCC_AHBPeriphClockCmd(uint32_t?RCC_AHBPeriph,?FunctionalState?NewState);
void?RCC_APB2PeriphClockCmd(uint32_t?RCC_APB2Periph,?FunctionalState?NewState);
void?RCC_APB1PeriphClockCmd(uint32_t?RCC_APB1Periph,?FunctionalState?NewState);

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3.3 時(shí)鐘源使能函數(shù)

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void?RCC_HSICmd(FunctionalState?NewState);
void?RCC_LSICmd(FunctionalState?NewState);
void?RCC_PLLCmd(FunctionalState?NewState);
void?RCC_RTCCLKCmd(FunctionalState?NewState);

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3.4 時(shí)鐘源和倍頻因子配置函數(shù)

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void?RCC_HSEConfig(uint32_t?RCC_HSE);
void?RCC_SYSCLKConfig(uint32_t?RCC_SYSCLKSource);
void?RCC_HCLKConfig(uint32_t?RCC_SYSCLK);
void?RCC_PCLK1Config(uint32_t?RCC_HCLK);
void?RCC_PCLK2Config(uint32_t?RCC_HCLK);

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3.5 外設(shè)時(shí)鐘復(fù)位函數(shù)

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void?RCC_APB2PeriphResetCmd(uint32_t?RCC_APB2Periph,?FunctionalState?NewState);
void?RCC_APB1PeriphResetCmd(uint32_t?RCC_APB1Periph,?FunctionalState?NewState);

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3.6 自定義系統(tǒng)時(shí)鐘

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void?RCC_HSE_Config(u32?div,u32?pllm)
{
????RCC_DeInit();
????RCC_HSEConfig(RCC_HSE_ON);
????if(RCC_WaitForHSEStartUp()==SUCCESS)
????{???
????????RCC_HCLKConfig(RCC_SYSCLK_Div1);
????????RCC_PCLK1Config(RCC_HCLK_Div2);
????????RCC_PCLK2Config(RCC_HCLK_Div1);
????????RCC_PLLConfig(div,pllm);
????????RCC_PLLCmd(ENABLE);?????
????while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY)==RESET)
????????RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK)
????while(RCC_GetSCLKSource()!=0x08);

????}
}

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　　審核編輯：湯梓紅