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TPS736 單路輸出 LDO、400mA、可調(diào)節(jié)電壓(1.2 至 5.5V)、無(wú)電容、低噪聲、反向電流保護(hù)

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描述 The TPS736xx family of low-dropout (LDO) linear voltage regulators uses a new topology: an NMOS pass element in a voltage-follower configuration. This topology is stable using output capacitors with low ESR, and even allows operation without a capacitor. It also provides high reverse blockage (low reverse current) and ground pin current that is nearly constant over all values of output current. The TPS736xx uses an advanced BiCMOS process to yield high precision while delivering very low dropout voltages and low ground pin current. Current consumption, when not enabled, is under 1 μA and ideal for portable applications. The extremely low output noise (30 μVRMS with 0.1-μF CNR) is ideal for powering VCOs. These devices are protected by thermal shutdown and foldback current limit.特性Stable with No Output Capacitor or Any Value or Type of CapacitorInput Voltage Range of 1.7 V to 5.5 VUltra-Low Dropout Voltage: 75 mV typExcellent Load Transient Response?with or without Optional Output CapacitorNew NMOS Topology Delivers Low Reverse Leakage CurrentLow Noise: 30 μVRMS typ (10 Hz to 100 kHz)0.5% Initial Accuracy1% Overall Accuracy Over Line, Load, and TemperatureLess Than 1 μA max IQ in Shutdown ModeThermal Shutdown and Specified Min/Max Current Limit ProtectionAvailable in Multiple Output Voltage VersionsFixed Outputs of 1.20 V to 5.0 V Adjustable Output from 1.20 V to 5.5 V Custom Outputs AvailableAPPLICATIONSPortable/Battery-Powered EquipmentPost-Regulation for Switching SuppliesNoise-Sensitive Circuitry such as VCOsPoint of Load Regulation for DSPs, FPGAs,ASICs, and MicroprocessorsC2000 Is a trademark of Texas Instruments All other trademarks are the property of their respective owners

電路圖、引腳圖和封裝圖

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