汽車級(jí)音頻處理器處理方案

ADI公司的ADAU1462/ADAU1466是汽車級(jí)音頻處理器,其數(shù)字信號(hào)處理能力大大超過(guò)以前的SigmaDSP?器件.其音頻處理算法支持流處理,多速率處理和塊處理范例無(wú)縫組合,核電壓1.2V,32位DSP核工作頻率高達(dá)294.912 MHz,取樣速率48kHz時(shí)高達(dá)6144 SIMD指令/取樣,高達(dá)1600ms數(shù)字音頻延遲池.集成了24KB程序存儲(chǔ)器,80KB參數(shù)/數(shù)據(jù)RAM,有四個(gè)串行輸入端口和4個(gè)串行輸出端口,主要用在汽車音頻處理如音響主機(jī),導(dǎo)航系統(tǒng),后座娛樂(lè)系統(tǒng),DSP放大器(音響系統(tǒng)放大器),商用和專業(yè)的音頻處理.本文介紹了ADAU1462/6主要特性,功能框圖和系統(tǒng)框圖,以及評(píng)估板EVAL-ADAU1466Z主要特性,框圖,電路圖,材料清單和PCB設(shè)計(jì)圖.

The ADAU1462/ADAU1466 are automotive qualified audio processors that far exceed the digital signal processing capabilities of earlier SigmaDSP? devices. They are pin and register compatible with each other, as well as with the ADAU1450/ADAU1451/ADAU1452 SigmaDSP processors. The restructured hardware architecture is optimized for efficient audio processing. The audio processing algorithms support a seamless combination of stream processing (sample by sample), multirate processing, and block processing paradigms. The SigmaStudio? graphical programming tool enables the creation of signal processing flows that are interactive, intuitive, and powerful. The enhanced digital signal processor (DSP) core architecture enables some types of audio processing algorithms to be executed using significantly fewer instructions than were required on previous SigmaDSP generations, leading to vastly improved code efficiency.

The 1.2 V, 32-bit DSP core can run at frequencies of up to 294.912 MHz and execute up to 6144 SIMD instructions per sample at the standard sample rate of 48 kHz. Powerful clock generator hardware, including a flexible phase-locked loop (PLL) with multiple fractional integer outputs, supports all industry standard audio sample rates. Nonstandard rates over a wide range can generate up to 15 sample rates simultaneously. These clock generators, along with the on board asynchronous sample rate converters (ASRCs) and a flexible hardware audio routing matrix, make the ADAU1462/ADAU1466 ideal audio hubs that greatly simplify the design of complex multirate audio systems.

The ADAU1462/ADAU1466 interface with a wide range of analog-to-digital converters (ADCs), digital-to-analog converters (DACs), digital audio devices, amplifiers, and control circuitry with highly configurable serial ports, I2C, serial peripheral interface (SPI), Sony/Philips Digital Interconnect Format (S/PDIF) interfaces, and multipurpose input/output(I/O) pins. Dedicated decimation filters can decode the pulse code modulation (PDM) output of up to four MEMS microphones. Independent slave and master I2C/SPI control ports allow the ADAU1462/ADAU1466 to be programmed and controlled by an external master device such as a microcontroller, and to program and control slave peripherals directly. Self boot functionality and the master control port enable complex standalone systems.

The power efficient DSP core can execute at high computational loads while consuming only a few hundred milliwatts (mW) in typical conditions. This relatively low power consumption and small footprint make the ADAU1462/ADAU1466 ideal replacements for large, general-purpose DSPs that consume more power at the same processing load. Note that throughout this data sheet, multifunction pins, such as SS_M/MP0, are referred to either by the entire pin name or by a single function of the pin, for example, MP0, when only that function is relevant.

ADAU1462/6主要特性:

Qualified for automotive applications

Fully programmable audio DSP for enhanced sound processing

Features SigmaStudio, a proprietary graphical programming tool for the development of custom signal flows

Up to 294.912 MHz, 32-bit SigmaDSP core at 1.2 V

Up to 24 kWords of program memory

Up to 80 kWords of parameter/data RAM

Up to 6144 SIMD instructions per sample at 48 kHz

Up to 1600 ms digital audio delay pool at 48 kHz

Audio I/O and routing

4 serial input ports, 4 serial output ports

48-channel, 32-bit digital I/O up to a sample rate of 192 kHz

Flexible configuration for TDM, I2S, left and right justified formats, and PCM

Up to 8 stereo ASRCs from 1:8 up to 7.75:1 ratio and 139 dB dynamic range

Stereo S/PDIF input and output at 192 kHz

Four PDM microphone input channels

Multichannel, byte addressable TDM serial ports? processing

ADAU1462/6應(yīng)用:

Automotive audio processing

Head units

Distributed amplifiers

Rear seat entertainment systems

Trunk amplifiers

Commercial and professional audio processing
?

圖1.ADAU1462/6功能框圖

圖2.ADAU1462/6帶外接元件連接的系統(tǒng)框圖

評(píng)估板EVAL-ADAU1466Z

This user guide details the design, setup, and operation of the EVAL-ADAU1466Z evaluation board. This device is suitable for evaluation of, and software development for, the ADAU1466 and ADAU1462 SigmaDSP processors. Note that the ADAU1466 and the ADAU1462 are functionally identical, except that the ADAU1466 has more program and data memory than the ADAU1462. When using this evaluation board to evaluate the ADAU1462, in the Setting Up Communications in SigmaStudio section, select the ADAU1462 block rather than the ADAU1466 as shown in Figure 15. Performing this action informs the compiler to limit the amount of memory allocated to match the ADAU1462. All other procedures and instructions in this user guide are identical for the ADAU1462 and ADAU1466.

This evaluation board provides access to the digital serial audio ports of the ADAU1466, as well as some of its general-purpose input/outputs (GPIOs). An analog input and output is provided by the AD1938 codec that is included in the evaluation kit. The ADAU1466 core is programmed using Analog Devices, Inc., SigmaStudio? software, which interfaces to the evaluation board via a USB interface (USBi). The on-board EEPROM can be programmed for self boot mode. The evaluation board is powered by a 6 V dc supply, which is regulated to the voltages required on the board. The printed circuit board (PCB) is a 4-layer design, with a ground plane and a power plane on the inner layers. The evaluation board includes connectors for external analog inputs and outputs, and optical Sony/Philips Digital Interface (S/PDIF) interfaces. The master clock is provided by the integrated oscillator circuit and the on-board 12.288 MHz passive crystal.

評(píng)估板EVAL-ADAU1466Z主要特性:

4 analog inputs

8 analog outputs

Stereo S/PDIF input and output

Self boot EEPROM memory

EVALUATION KIT CONTENTS

EVAL-ADAU1466Z evaluation board

EVAL-ADUSB2EBZ (USBi) communications adapter

USB cable with Mini-B plug

6 V ac to dc power supply

圖3.評(píng)估板EVAL-ADAU1466Z外形圖

圖4.評(píng)估板EVAL-ADAU1466Z功能框圖

圖5.評(píng)估板EVAL-ADAU1466Z布局框圖

圖6.評(píng)估板EVAL-ADAU1466Z電路圖:SigmaDSP音頻處理器

圖7.評(píng)估板EVAL-ADAU1466Z電路圖:自舉電路

圖8.評(píng)估板EVAL-ADAU1466Z電路圖:S/PDIF光接口

圖9.評(píng)估板EVAL-ADAU1466Z電路圖:靜態(tài)LED

圖10.評(píng)估板EVAL-ADAU1466Z電路圖:DIP開(kāi)關(guān)

圖11.評(píng)估板EVAL-ADAU1466Z電路圖:AUXADC電位計(jì)

圖12.評(píng)估板EVAL-ADAU1466Z電路圖:AD1938音頻CODEC

圖13.評(píng)估板EVAL-ADAU1466Z電路圖:電源

圖14.評(píng)估板EVAL-ADAU1466Z電路圖:重置發(fā)生器電路

圖15.評(píng)估板EVAL-ADAU1466Z電路圖:SPI通信接口插座

圖16.評(píng)估板EVAL-ADAU1466Z電路圖:模擬輸入通路0和1

圖17.評(píng)估板EVAL-ADAU1466Z電路圖:模擬輸入通路16和17

圖18.評(píng)估板EVAL-ADAU1466Z電路圖:模擬輸出通路0和1

圖19.評(píng)估板EVAL-ADAU1466Z電路圖:模擬輸出通路16和17

圖20.評(píng)估板EVAL-ADAU1466Z電路圖:模擬輸出通路32和33

圖21.評(píng)估板EVAL-ADAU1466Z電路圖:模擬輸出通路40和41

圖22.評(píng)估板EVAL-ADAU1466Z電路圖:去耦電容

評(píng)估板EVAL-ADAU1466Z材料清單:

圖23.評(píng)估板EVAL-ADAU1466Z PCB布局圖:頂層裝配圖

圖24.評(píng)估板EVAL-ADAU1466Z PCB布局圖:頂層銅

圖25.評(píng)估板EVAL-ADAU1466Z PCB布局圖:地平面

圖26.評(píng)估板EVAL-ADAU1466Z PCB布局圖:電源平面

圖27.評(píng)估板EVAL-ADAU1466Z PCB布局圖:底層銅

圖28.評(píng)估板EVAL-ADAU1466Z PCB布局圖:底層裝配圖