選擇串行接口明智的最佳連接

　　選擇串行接口明智的最佳連接

　　微控制器提供一個(gè)非常廣泛的串行接口的選擇。串行接口的選擇可能與外圍組件所要求的那樣簡(jiǎn)單，但是當(dāng)您選擇使用一個(gè)明智的決定的接口時(shí)，系統(tǒng)的性能會(huì)有很大的不同。通用串行接口SPI、UART我2C，或可能是最常見的選擇，但如何更專業(yè)的接口，或SMBus / PMBus？這些選擇什么時(shí)候最好？本文將更詳細(xì)地檢查這些串行接口標(biāo)準(zhǔn)，并探討一些常見的實(shí)現(xiàn)，以獲得更好的想法的應(yīng)用程序，他們最適合的類型。

　　通用異步收發(fā)器

　　也許最熟悉的串行接口是可敬的通用異步收發(fā)器（UART）。這個(gè)簡(jiǎn)單的異步協(xié)議采用單線傳輸數(shù)據(jù)和另一個(gè)接收，使用簡(jiǎn)單的數(shù)據(jù)框顯示在圖1頂部。該行開始在空閑狀態(tài)下，一個(gè)高電壓電平和低持續(xù)邊緣定義的數(shù)據(jù)幀的開始。多個(gè)數(shù)據(jù)位跟隨，指示數(shù)據(jù)值的低或高電平?？蛇x的第八數(shù)據(jù)位和奇偶校驗(yàn)位可以包括在數(shù)據(jù)幀的結(jié)尾。事實(shí)上，第八位數(shù)據(jù)是可選的，給你一個(gè)標(biāo)準(zhǔn)的老。誰(shuí)會(huì)想到創(chuàng)建一個(gè)只有7個(gè)數(shù)據(jù)位的現(xiàn)代標(biāo)準(zhǔn)？）一個(gè)自由運(yùn)行的時(shí)鐘，通常是幾倍的數(shù)據(jù)傳輸頻率，用于捕獲數(shù)據(jù)位后的起始位。接收方通常可以通過(guò)檢查數(shù)據(jù)速率和在起始位和停止位之間的時(shí)間窗口來(lái)“確定”傳輸數(shù)據(jù)速率。一個(gè)UART的數(shù)據(jù)速率通常低于其他串行協(xié)議，但是它的簡(jiǎn)單性和普適性（幾乎所有的單片機(jī)具有多個(gè)UART外設(shè)）使它像傳感器的低性能的應(yīng)用程序的一個(gè)不錯(cuò)的選擇，簡(jiǎn)單的控制器和子系統(tǒng)的通信是通過(guò)電線或通過(guò)板對(duì)板連接器。

　　You might think that there is little innovation possible with this type of interface， but with the continued drive for low-power operation even the familiar UART is getting attention. For example， Silicon Labs’ Energy Micro Tiny Gecko MCU devices like the EMF32TG210 include a special low-energy implementation of the familiar UART peripheral. The low-energy UART can operate independently in the low-power EM2 mode （with much of the core functionality turned off）。 The low-energy UART also can wait for an incoming UART frame in a very-low-power mode. When an incoming frame is detected the CPU can be woken up. Alternatively， multiple frames can be moved to on-chip SRAM using the DMA controller with CPU intervention， as illustrated in the bottom of Figure 1. For even more power-efficient operation the low-energy UART can even block data reception until a configurable-start frame is detected. Additionally， a configurable-signal frame can be used to generate an interrupt， perhaps to indicate the end of a block transfer， to wake the CPU. The data- transfer rate of the low-energy UART is limited to 9600 baud， but the 150 nA power dissipation during wait and the few uA required during active communication make this a very power-efficient approach.