Agilent SVM3500用戶指南

Main Features
? 6U single slot VME/VXS (VITA 41) module
? Quad-channel 12-bit 500 MS/s ADC
? Dual 12-bit 1GS/s and single 12-bit 2GS/s
configuration possibilities
? External clock distributed by an in-house developed low
jitter chipset
? One Xilinx? Virtex-5 FPGA providing on board FIR for
interleaving mismatch correction
? Lookup table providing data correction
? Two Xilinx Virtex-4 FPGAs for real-time signal
processing and data flow control
? Two on-board DDR2 SDRAM banks, 32 Mwords, each
64-bit wide, for a total of 512 MB processing memory
? Tundra TSI148 VME bus interface, VME64x and
2eSST compliant
? VXS VITA 41.0 compliant, 8x 3.125 Gbps serial I/O links on P0 connector

? Two front panel SFP slots for up to 3.125 Gbps fiber or
copper transceivers
? Auxiliary I/O mezzanine with multipurpose 12-bit
65 MS/s ADC, 12-bit 130 MS/s DAC, and 14 digital
front-panel I/O ports
? External trigger input
? High-speed digital I/O on P0 and P2 user-defined I/O
? Firmware Development Kit containing FPGA interface
cores, software, and reference design
? FPGA-based VXS and optical data link interfaces for
easier adaptation to different protocols
? Local FLASH memory to store multiple FPGA bitstreams
for complex, multimode applications
? Device drivers for Windows?, VxWorks?, and Linux?