資料介紹
This 32-bit buffer/driver is designed for 2.7-V to 3.6-V VCC operation.
The SN74LVCZ32240A is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
The device can be used as eight 4-bit buffers, four 8-bit buffers, two 16-bit buffers, or one 32-bit buffer. This device provides inverting outputs.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.
During power up or power down, when VCC is between 0 and 1.5 V, the device is in the high-impedance state. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down
(VCC = 0 V). The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
- SN74AVCH32T245,pdf(32-BIT DUAL
- SN74LVCH32373A,pdf(32-BIT TRAN
- SN74LVC32373A,pdf(32-BIT TRANS
- SN74LVCH32374A,pdf(32-Bit Edge
- SN74LVCZ32245A,pdf(32-BIT BUS
- SN74LVCZ16245A,pdf(16-Bit Bus
- SN74LVCR32245A,pdf(32-BIT BUS
- SN74LVCHR32245A,pdf(32-BIT BUS
- SN74LVCH32245A,pdf(32-BIT BUS
- SN74GTLPH32945,pdf(32-Bit LVTT
- SN74GTLPH3245,pdf(32-Bit LVTTL
- SN74LVCZ32244A,pdf932-BIT BUFF
- SN74LVCZ16244A,pdf(16-Bit Buff
- SN74LVCH32244A,pdf(32-BIT BUFF
- SN74LVCZ16240A,pdf(16-Bit Buff
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