Programmable Logic for the Masses： Lattice MACHXO2 CPLDs

　　Programmable Logic for the Masses： Lattice MACHXO2 CPLDs

　　任何邏輯設(shè)計(jì)者都會(huì)告訴你，離散邏輯運(yùn)行良好，但決不是真正的理想解決方案。除非你需要的是一個(gè)單一的門或逆變器，建立邏輯功能從離散的邏輯芯片可以采取許多設(shè)備，電路板空間和電源。這一點(diǎn)尤其如此，因?yàn)楦呒?jí)功能塊是由原始邏輯元素從底層構(gòu)建而成的。

　　超低成本評(píng)估和開發(fā)工具包是一個(gè)很好的方法來探索一項(xiàng)對(duì)你來說可能沒有風(fēng)險(xiǎn)或時(shí)間的新技術(shù)。PLD技術(shù)就是一個(gè)很好的例子。

　　萊迪思半導(dǎo)體是PLD、CPLD、FPGA供應(yīng)商誰提供一個(gè)低成本的開發(fā)工具包，支持machxo2，一家人。本文以在功能和家庭功能的machxo2看起來和新的machxo2微微開發(fā)工具包。這座“罩”下，讓你知道如果你決定有機(jī)會(huì)在您的路徑使用可編程邏輯的期望。

　　Programmable perspective

　　Programmable Logic Devices have been around for a long time and have earned their way into our boards and systems. Early simple， sum-of-products， fusible-link technology has given way to ASIC-like densities and in-system Flash-based re-programmability. I/O cells have improved to provide higher speed interfaces， differential interfaces， high-drive and sink pins， as well as offering dynamic bi-directional control. Very useful on-chip resources include oscillators， PLLS， regulators， charge pumps， and other system functions.

　　One key advance is function libraries available for today’s PLDs， CPLDs， and FPGAs that provide canned function-block solutions to simple and complex sub-systems. While some IP is bought or licensed， device makers provide many free IP blocks to entice us into using their parts. These include UARTs， I2C and SPI interfaces， memory controllers and more.

　　Tools make a difference， as well， and here， most PLD makers have their own or receive support from third parties. Tools can be free or expensive. It is not always true that you get what you pay for. In many cases， free or low-cost tools are as good as the store-bought flavors or better. This is especially true when it comes to taking advantage of specific CPLD and FPGA architectures.