cy7c1010dv33 2兆位（256 K×8）靜態(tài)RAM

　　The CY7C1010DV33 is a high performance CMOS Static RAM organized as 256 K words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable （CE）， an active LOW Output Enable （OE）， and three-state drivers. Writing to the device is accomplished by taking Chip Enable （CE） and Write Enable （WE） inputs LOW. Data on the eight I/O pins （I/O0 through I/O7） is then written into the location specified on the address pins （A0 through A17）。 Reading from the device is accomplished by taking Chip Enable （CE） and Output Enable （OE） LOW while forcing Write Enable （WE） HIGH. Under these conditions， the contents of the memory location specified by the address pins will appear on the I/O pins. The eight input and output pins （I/O0 through I/O7） are placed in a high impedance state when the device is deselected （CE HIGH）， the outputs are disabled （OE HIGH）， or during a Write operation （CE LOW， and WE LOW）。 The CY7C1010DV33 is available in 36-pin SOJ and 44-pin TSOP II packages with center power and ground （revolutionary） pinout. For a complete list of related documentation， click here.