飛思卡爾半導(dǎo)體技術(shù)數(shù)據(jù)mpc5121e/mpc5123 數(shù)據(jù)表

　　The MPC5121e/MPC5123 integrates a high performance e300 CPU core based on the Power Architecture? Technology with a rich set of peripheral functions focused on communications and systems integration. Major features of the MPC5121e/MPC5123 are： ? e300 Power Architecture processor core ? Power modes include doze， nap， sleep， deep sleep， and hibernate ? AXE – Auxiliary Execution Engine ? MBX Lite – 2D/3D graphics engine （not available in MPC5123） ? DIU – Display interface unit ? DDR1， DDR2， and LPDDR/mobile-DDR SDRAM memory controller ? MEM – 128 KB on-chip SRAM ? USB 2.0 OTG controller with integrated physical layer （PHY） ? DMA subsystem ? EMB – Flexible multi-function external memory bus interface ? NFC – NAND flash controller ? LPC – LocalPlus interface ? 10/100Base Ethernet ? PCI interface， version 2.3 ? PATA – Parallel ATA integrated development environment （IDE） controller ? SATA – Serial ATA controller with integrated physical layer （PHY） ? SDHC – MMC/SD/SDIO card host controller ? PSC – Programmable serial controller ? I2 C – inter-integrated circuit communication interfaces ? S/PDIF – Serial audio interface ? CAN – Controller area network ? BDLC – J1850 interface ? VIU – Video Input， ITU-656 compliant ? RTC – On-Chip real-time clock ? On-chip temperature sensor ? IIM – IC Identification module