三重200毫安低噪聲高電源抑制比的電壓調(diào)節(jié)器ADP322/ADP323數(shù)據(jù)表

　　The ADP322/ADP323 200 mA triple output LDOs combine high PSRR， low noise， low quiescent current， and low dropout voltage to extend the battery life of portable devices and are ideally suited for wireless applications with demanding performance and board space requirements. The ADP322/ADP323 PSRR is greater than 60 dB for frequencies as high as 100 kHz while operating with a low headroom voltage. The ADP322/ADP323 offer much lower noise performance than competing LDOs without the need for a noise bypass capacitor. The ADP322/ADP323 are available in a miniature 16-lead， 3 mm × 3 mm LFCSP package and are stable with tiny 1 μF ±30% ceramic output capacitors providing the smallest possible board area for a wide variety of portable power needs. The ADP322 is available in output voltage combinations ranging from 0.8 V to 3.3 V and offers overcurrent and thermal protection to prevent damage in adverse conditions. The ADP323 adjustable triple LDO can be configured for any output voltage between 0.5 V and 5 V with two resistors for each output.