0.8A微PMU降壓兩300毫安LDO監(jiān)控看門狗和手動復(fù)位ADP5042數(shù)據(jù)表

　　The ADP5042 combines one high performance buck regulator and two low dropout regulators （LDO） in a small 20-lead LFCSP to meet demanding performance and board space requirements. The high switching frequency of the buck regulator enables use of tiny multilayer external components and minimizes the board space. The MODE pin selects the buck mode of operation. When set to logic high， the buck regulators operate in forced PWM mode. When the MODE pin is set to logic low， the buck regulators operate in PWM mode when the load is around the nominal value. When the load current falls below a predefined threshold the regulator operates in power save mode （PSM） improving the light-load efficiency. The low quiescent current， low dropout voltage， and wide input voltage range of the ADP5042 LDOs extend the battery life of portable devices. The two LDOs maintain power supply rejection greater than 60 dB for frequencies as high as 10 kHz while operating with a low headroom voltage. Each regulator is activated by a high level on the respective enable pin. The ADP5042 is available with factory programmable default output voltages and can be set to a wide range of options. The ADP5042 contains supervisory circuits that monitor power supply voltage levels and code execution integrity in microprocessor-based systems. They also provide power-on reset signals. An on-chip dual watchdog timer can reset the microprocessor or power cycle the system （Watchdog 2） if it fails to strobe within a preset timeout period.