LVDS串并轉(zhuǎn)換器手冊(cè)

　　The DS92LV18 Serializer/Deserializer （SERDES） pair transparently translates a 18–bit parallel bus into a BLVDS serial stream with embedded clockinformation. This single serial stream simplifiestransferring a 18-bit， or less， bus over PCB tracesand cables by eliminating the skew problemsbetween parallel data and clock paths. It savessystem cost by narrowing data paths that in turnreduce PCB layers， cable width， and connector size and pins.This SERDES pair includes built-in system anddevice test capability. The line loopback featureenables the user to check the integrity of the serialdata transmission paths of the transmitter andreceiver while deserializing the serial data to paralleldata at the receiver outputs. The local loopbackfeature enables the user to check the integrity of the transceiver from the local parallel-bus side.The DS92LV18 incorporates modified BLVDSsignaling on the high-speed I/O. BLVDS provides alow power and low noise environment for reliablytransferring data over a serial transmission path. Theequal and opposite currents through the differentialdata path control EMI by coupling the resultingfringing fields togeth