采用FPGA的高速CCD相機(jī)的時(shí)鐘發(fā)生器

采用IL2E2 TDI CCD 做為傳感器,與計(jì)算機(jī)構(gòu)成了成像系統(tǒng),并在計(jì)算機(jī)CRT 上顯示出圖像。主要介紹高速CCD 相機(jī)的工作時(shí)鐘產(chǎn)生電路的設(shè)計(jì),采用大規(guī)模集成電路FPGA 實(shí)現(xiàn)了該工作時(shí)鐘驅(qū)動(dòng)電路,采用AHDL 語言對(duì)工作時(shí)鐘驅(qū)動(dòng)電路進(jìn)行了硬件描述,并利用Max Plus2 軟件對(duì)所設(shè)計(jì)的工作時(shí)鐘驅(qū)動(dòng)電路進(jìn)行了仿真,最后對(duì)FPGA 器件進(jìn)行了編程和硬件電路調(diào)試,進(jìn)而實(shí)現(xiàn)了整個(gè)CCD 相機(jī)的控制。
關(guān)鍵詞: 電荷耦合器件; 時(shí)間延遲積分; 現(xiàn)場(chǎng)可編程邏輯陣列
Abstract : An image system is constructed with a PC computer by using IL2E2 TDI CCD sensor. The images are displayed in the CRT of the computer. The design to the timing generator of a high speed CCD camera is mainly described by using FPGA. The hardware description to the timing generator circuits is realized by using the AHDL language. The simulation to the timing generator circuits is made by using Max Plus2 software. Finally ,
after programming a FPGA chip and making the experiment of the circuits , the control of a CCD camera is real2 ized.
Key words : charge coupled device (CCD) ; time delay integration ( TDI) ; fied programable gate arry (FPGA)