單位增益緩沖器：The Unity-Gain Buffer

單位增益緩沖器：The Unity-Gain Buffer

The unity-gain buffer is shown in Figure 3. The circuit gives the highest input impedance of any operational amplifier circuit. Input impedance is equal to the differential input impedance multiplied by the open-loop gain, in parallel with common mode input impedance. The gain error of this circuit is equal to the reciprocal of the amplifier open-loop gain or to the common mode rejection, whichever is less. Input impedance is a misleading concept in a DC coupled unity-gain buffer. Bias current for the amplifier will be supplied by the source resistance and will cause an error at the amplifier input due to its voltage drop across the source resistance. Since this is the case, a low bias current amplifier such as the LH1026 should be chosen as a unity-gain buffer when working from high source resistances. Bias current compensation techniques are discussed in Reference 5. The cautions to be observed in applying this circuit are three: the amplifier must be compensated for unity gain operation, the output swing of the amplifier may be limited by the amplifier common mode range, and some amplifiers exhibit a latch-up mode when the amplifier common mode range is exceeded. The LM107 may be used in this circuit with none of these problems; or, for faster operation, the LM102 may be chosen.

圖3給出了單位增益放大器（緩沖器、跟隨器——譯者）的電路。這個電路在所有的放大器組態(tài)電路中具有最高的輸入阻抗。其輸入阻抗值為，開環(huán)增益與差模輸入阻抗之積和共模輸入阻抗相并聯(lián)。其增益誤差等于開環(huán)增益的倒數(shù)、CMRR值中較小者。在這種直流耦合，單位增益組態(tài)下，輸入電阻是一個不合適的電路概念。由于輸入偏置電流由信號源提供，這樣就會在信號源的內(nèi)阻上造成壓降，成為輸入信號電壓的誤差來源。在這種情況下，可以選用例如LH1026之類的低偏置電流的OP，以便減小在對高內(nèi)阻信號源放大的情況下的誤差。偏置電流補(bǔ)償技術(shù)請參考文獻(xiàn)5。本電路的設(shè)計注意事項有3個：必須對OP在單位增益狀態(tài)下作補(bǔ)償。輸出電壓的擺幅可能會被OP的共模范圍所限制。在輸入超過起共模范圍時，有的OP可能會進(jìn)入阻塞狀態(tài)。LM107可以避免上述問題，另外也可以選用高速OP，LM102。